Avinash G. Mahalle
Assistant Professor
Qualification :- Ph.D (pursuing), M.Tech (ESC), B.Tech (EXTC)
Subject Taught
Analog & Digital Electronics, Mobile Computing, Professional Ethics & Management, Big Data Analytics, Communication Engineering, Electronics Devices & Circuits, Control System Engineering, Analog Electronics-II
Teaching Experience
6 Year
Industrial Experience
0 Year
Area of Interest
Digital Image Processing, VLSI, Solar Photovoltaic Systems, Communication Engineering
Papers Published
National :0, International : 6
Teaching
Information Technology
Contact
E-mail.:agmahalle@mitra.ac.in Mob. No.:7588891134
| Sr.No | Paper Name | Paper Link |
|---|---|---|
| 1 | A Review on FPGA Implementation of Edge Detection Algorithms | Click Here |
| 2 | FPGA Implementation of Gradient Based Edge Detection Algorithms | Click Here |
| 3 | Hardware Co-Simulation of Classical Edge Detection Algorithms Using Xilinx System Generator | Click Here |
| 4 | An Efficient Design for Canny Edge Detection Algorithm using Xilinx System Generator | Click Here |
| 5 | Hardware Implementation of Image Enhancement Techniques in Spatial Domain | Click Here |
| 6 | A Survey on different techniques in Artificial Intelligence that can be enforced in Cybersecurity | Click Here |